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How AMBA CHI Specification Has Evolved
In my previous article (From AMBA ACE to CHI, Why Move for Coherency?) I talked about how coherency needs have evolved from AMBA ACE to the highly successful and widely adopted CHI architecture.Since...
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Re-Timer – The Key for High-Speed Signal Transmission in USB4 Systems
The objective of USB4 protocol to achieve high speed signal transmission and thereby providing high data bandwidths for protocol tunneling would not have been possible without USB4 re-timer. Like...
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Mind reading? Almost. Specman New Typo Error Prediction Feature
Presenting Specman syntax error messages enhancement - provide suggestions to fix typos. Starting Specman 21.09, the next time you get a compilation error of the kind “no such variable xxx”, or “yyy...
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Training Insights - Embracing Datapath Verification with Jasper C2RTL App
Current verification techniques cannot keep pace with the growing arithmetic nature of today´s designs.With the advent of AI, cryptography, and other emerging domains, the amount of datapath in designs...
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Addressing Hyperscalers' Requirements with Ethernet 800G
Cloud computing, IoT (Internet of Things), machine learning, big data, and data centers are a few of those buzzwords levitating around digital transformation in recent years and we are quite familiar...
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MIPI UniPro 2.0 for Higher Data Rate Transmissions
MIPI specifications are widely used across the Mobile and IoT industries, mainly for applications like cameras, sensors, modems, storage, audio, displays and other peripherals. In the last few years,...
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How to Verify JEDEC DRAM Memory Controller, PHY, or Memory Device?
DDR Memory is an important part of a wide array of electronic system designs in various verticals like Data centers, Cloud computing, Aero-Defense, Mobile, or any other consumer devices. These...
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Boost your CXL Verification From IP to System-Level
Knowingly or unknowingly, we are consuming huge volumes of data from getting up early with Google/Siri, doing day-to-day work, using maps while driving till the time we call it a day and retiring in...
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LPDDR5 Verification from PHY to System Level
LPDDR5 DRAM aims to serve a wide array of markets and plays a vital role in the system’s performance. These performance expectations make the whole system verification extremely challenging and become...
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Device Training for High Speed DRAMs
As the device frequencies and the data rates go up with every new generation of Interface and memory devices, sampling of the signals and the transferring of the data b/w Initiator and target is being...
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AMBA Distributed Translation Interface (DTI) for Arm System MMU
In ARM MMU-based systems, DTI protocol defines a standard way to communicate with Translation Control Unit (TCU). DTI protocol is a point-to-point protocol with each channel defining a link. The...
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System Verification Scoreboard: Its Role and Partnership with Verification IPs
As discussed in the last installment of the blog, a robust system level scoreboard is essential for functional verification and performance validation of modern SoCs.A properly architected system...
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How AMBA CHI Specification Has Evolved - CHI-E (r)evolutionary?
We covered CHI specification revisions A to D in my previous article, what about Issue E?Issue E was by far the biggest update yet with a slew of new transactions, optimization features to interface...
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Demystifying CXL.cache
If you have worked with Peripheral Component Interconnect Express (PCIe) in the past, you might have heard Compute Link Express (CXL) is break-through technology for modern day compute requirements...
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Data Integrity for JEDEC DRAM Memories
With the DRAM fabrication advancing from 1x to 1y to 1z and further to 1a, 1b and 1c nodes along with the DRAM device speeds going up to 8533 for Lpddr5/8800 for DDR5, Data integrity is becoming a...
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Automotive Revolution with Ethernet Base-T1
The automotive industry revolutionized the definition of a vehicle in terms of safety, comfort, enhanced autonomy, and internet connectivity. With this trend, the automotive industry rapidly adopted...
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JEDEC UFS 4.0 for Highest Flash Performance
Speed increase requirements keep on flowing by in all the domains surrounding us. The same applies to memory storage too. Earlier mobile devices used eMMC based flash storage, which was a significantly...
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Achieve 80% Less Late-Stage RTL Changes and Early RTL Bug Detection
It has become challenging to ensure that the designs are complete, correct, and adhere to necessary coding rules before handing them off for RTL verification and implementation. RTL Designer Signoff...
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Flash Toggle NAND 4.0 in a Nutshell
NAND Flash memory is now a widely accepted non-volatile memory in many application areas for data storage such as digital cameras, USB drive, SSD and smartphones. One form of NAND flash memory, Toggle...
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TSN-PTP: A Real-Time Network Clock Synchronizing Protocol
In a network containing multiple nodes, the need for synchronization between the various nodes is not just instrumental but also a complicated and highly complex process. This process becomes even more...
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